1. Field of the Invention
This invention is related to the field of chip multiprocessors (CMP) and, more particularly, to reconfiguration of resources within a CMP.
2. Description of the Related Art
Chip multiprocessors (CMPs) are becoming increasingly popular. A CMP has two or more processor cores implemented on the same integrated circuit (IC) device. The increase in popularity may be due, at least in part, to the notion that a CMP may be a more efficient use of the millions of transistors that may be included on an integrated circuit than, for example, a more elaborate single processor.
The testing of processors involves the generation and execution of test files that include a large number of test vectors. Due to their size, the test vectors may require long execution times and a great deal of storage. Test vector memory is one of the cost considerations when buying test equipment. When the processor is a CMP, there may be multiple processor cores in one IC. To test a CMP with two cores, for example, due to the interconnection of the two cores, a set of test vectors may be used to test one core and a second set of test vectors may be used to test the second core. In addition, a third set of test vectors may be used to test the inter-functionality of the two cores. This arrangement may strain available test vector memory and test generation time.